This application claims the priority of Japanese Patent Application No. 10-134382 filed on Apr. 28, 1998, which is incorporated herein by reference.
This invention relates to an apparatus for thin film growth and, more specifically, to an improvement in temperature uniformity in an apparatus for growth of silicon single crystal thin films.
Design rules for semiconductor devices are coming to reach the order of sub-quarter microns in practical level. As the amount of charges handled by semiconductor devices is decreased as a result of micro-structuring of the devices, the possibility that even slight micro defects in the vicinity of the wafer surface have critical effects on device characteristics becomes larger than ever, so that performance deteriorations particularly in bipolar circuits and CMOS circuits matter.
Therefore, it can be predicted that, from now on, mirror polished wafers fabricated by slicing and polishing a silicon single crystal ingot pulled up from the melt solution is increasingly substituted by use of silicon epitaxial wafers in which a silicon single crystal thin film is grown in vapor phase further on the surface of the mirror-polished wafer.
For silicon epitaxial wafers, there is a demand for high degree of thickness uniformity. This thickness uniformity may be expressed alternatively as the flatness of the silicon epitaxial layer grown in vapor phase on the mirror-polished wafer, because the original mirror-polished wafer has a high degree of flatness. The demand for high degree of flatness is due to a need of gaining as much process margin as possible, since exposure light used for recent years"" photolithography has been shortened in wavelength down to far ultraviolet wavelength region so that the depth of focus has been considerably reduced. Still, this demand becomes increasingly stricter as the wafer diameter is enlarged from existing 200 mm to 300 mm and further beyond.
FIG. 1 shows one arrangement example of a single-wafer type vapor phase growth apparatus 10. This apparatus is designed to perform vapor phase epitaxial growth while heating a wafer W, which is set one at a time within a process vessel (reaction+vessel) 1 made of transparent quartz, from above and below with infrared lamps 9.
The process vessel 1 is internally divided into an upper space 1a and a lower space 1b by a susceptor 5 for placing the wafer W thereon. In this upper space 1a, raw material gas introduced through a gas supply port 2 along with H2 gas, which is a carrier gas, flows on the surface of the wafer W in a direction of arrow A in the figure while forming nearly a laminar flow, and is discharged through an exhaust port 4 on the opposite side. To the lower space 1b, H2 gas, which is the purge gas, is supplied at a pressure higher than that for the raw material gas. The reason of higher pressure for the purge gas is to prevent the raw material gas from entering the lower space 1b through clearances between the process vessel 1 and the susceptor 5.
In the lower space 1b are contained support means made of quartz and serving for supporting the susceptor 5 on its rear face, and a lift pin 8 for setting and removing the wafer W on the susceptor 5.
The support means comprises a rotating shaft 6, and a plurality of spokes 7 radially branched from a tip end portion of the rotating shaft 6. Vertical pins 7b are provided at distal ends of the spokes 7, and tip ends of the vertical pins 7b are brought into contact with the rear face of the susceptor 5, by which the susceptor 5 is supported. The rotating shaft 6 can be rotated by unshown driving means in a direction of arrow C in the figure.
The lift pin 8 is enlarged in diameter at its head portion, and this head portion is hung on a tapered side wall portion of a through hole 5b provided at the bottom face of a pocket 5a of the susceptor 5 for placing the wafer W thereon. Shaft portion of the lift pin 8 is inserted into a through hole 7a bored midway in the spokes 7, so that the lift pin 8 is hung down stably.
The wafer W is set and removed on the susceptor 5 by up and down movement of the support means. For example, when the wafer W is removed from the susceptor 5, the support means is lowered until the tail portion of the lift pin 8 makes contact with the inside wall of the lower space 1b of the process vessel 1 as shown in FIG. 2. The lift pin 8 resultantly biased collides against the rear face of the wafer W at its head portion, causing the wafer W to come up above the pocket 5a. After that, with a handler inserted into the space between the susceptor 5 and the wafer W, the wafer W is delivered and conveyed.
The material of the susceptor 5 is commonly given by a carbon base material coated with SiC (silicon carbide). The selection of carbon as the base material is attributed partly to the fact that the most popular heating system for vapor phase growth apparatus in their early development stages was high frequency induction heating, and besides partly to such merits of carbon as easiness to obtain high-purity products, easiness to process, superiority in thermal conductivity, resistance to breakage and the like. However, because of some problems, for example, that carbon is a porous substance and so may emit occluded gas during the process, and that carbon and raw material gas react with each other to cause the surface of the susceptor to change to SiC in the process of silicon epitaxial growth, the structure that the surface of carbon base material is coated with SiC from the beginning. The SiC coating is deposited commonly by CVD (Chemical Vapor Deposition).
The material of the lift pin 8 is given by a SiC-coated carbon base material, like the susceptor 5.
Whereas the demand for the flatness of epitaxial wafers has been growing stricter year by year, it has been found out that the epitaxial layer has thickness differences depending on the position in the surface of the epitaxial wafer even with single-wafer type vapor phase growth apparatus devised in terms of structure and material as described above. In particular when the thickness of the epitaxial layer exceeds approximately 8 xcexcm, thickness differences in the surface of the epitaxial layer tend to increase noticeably to a level undesirable for practical use.
In a case where a p-type silicon epitaxial layer (resistivity=10 xcexa9xc2x7cm) is grown in vapor phase with a target thickness of 15 xcexcm on a 200 mm-dia. P+-type, (100)-oriented single crystal silicon substrate, FIG. 6 shows flatnesses of the layer. This figure is a mapping of flatness on the wafer, where with the whole wafer surface divided into 20 mm square cells, their maximum values of differences in elevation between a reference plane determined by the best fit method and projected portions or recessed portions generated in the individual cells are represented in absolute value (SFQD pursuant to the definition of SEMI). From this figure, it can be seen that differences in thickness of the epitaxial layer are extremely large at edge portions generally falling upon tripartite points of the circumference. These are impermissible for practical use.
Therefore, it is an object of the present invention to provide a thin film growth apparatus capable of improving the film thickness uniformity of produced silicon single crystal thin films.
Focusing attention on the fact that points of worse numerical values in the mapping of flatness shown in FIG. 6 mentioned above are generally coincident with the fulcrums of the lift pin, the present inventors set up a tentative theory that heat of the susceptor was absorbed by the lift pin and dissipated at those points of worse values so that the wafer temperature was locally lowered and the film thickness uniformity of the epitaxial layer was deteriorated. The inventors verified that successful results can be obtained by changing the base material of the lift pin to one having a thermal conductivity lower than that of the susceptor base material according to this theory, thus having reached the proposal of this invention.
According to the invention, there is provided an apparatus for thin film growth in which with a substrate placed on a susceptor set in a process vessel (reaction vessel), a silicon single crystal thin film is grown in vapor phase on the substrate while raw material gas is supplied into the process vessel, where a lift pin to be inserted into a through hole bored in a pocket of the susceptor serving for placement of the substrate is made of a base material lower in thermal conductivity than a base material of the susceptor.
According to the invention, by changing the base material of the lift pin, the vapor phase growth apparatus of the invention is enabled to prevent any temperature decrease in the vicinity of the lift pin position and to improve the temperature distribution of the wafer surface, and as a result, to suppress variations in film thickness of the silicon epitaxial layer to the order of 0.01 xcexcm in the vicinity of the lift pin position. Accordingly, yield of semiconductor devices formed on the epitaxial wafer can be improved and besides quality trouble of semiconductor devices can be prevented in advance.
The invention is a technique for enhancing the practical performance of single-wafer type vapor phase growth apparatus that can be expected to become popular with the trend toward larger diameters of wafers, being of exceedingly high industrial value in the semiconductor manufacturing field.